The invention relates to semiconductor devices and circuits, and, more particularly, to both semiconductor testing.
Many digital semiconductor devices, such as DRAMs, SRAMs, A/D converters, and so forth rely on electrical charge on a capacitive node for storage of a digital signal, and thus such devices are sensitive to events which transport unintended charge to the node. For example, naturally occurring radioactive elements such as uranium and thorium appear in trace amounts in the packaging materials for integrated circuits; and these elements decay to release energetic alpha particles. The alpha particles penetrate the integrated circuit and create electron-hole pairs. Local electric fields, such as at pn junctions, can separate the electron-hole pairs and a net charge pulse is collected at a node. Such a charge pulse can change the state of the node and thereby cause a soft error.
Experimental testing of alpha particle effects can be simulated by directing a beam of alpha particles from an accelerator into an integrated circuit and checking upon performance. Such an experimental setup removes the top (decaps) of an integrated circuit package but does not attempt to remove any of the protective overcoat of the silicon die; the alpha particles have sufficient energy (1-5 MeV) to penetrate the patterned layers on the die and pass well into the silicon substrate. It is known to focus an alpha particle beam to provide detailed analysis of the alpha particle effects.
Cosmic rays provide another source of unintended charge effects: high energy (100+ MeV) protons and neutrons of varying energy can interact with silicon or other nuclei in the integrated circuit to produce energetic heavy recoil nuclei which generate electron-hole pairs. FIG. 1 shows the cosmic ray flux at sea level. O'Gorman, The Effect of Cosmic Rays on the Soft Error Rate of a DRAM at Ground Level, 41 IEEE Tr.Elec.Dev. 533 (1994) measures the soft error rate in a set of DRAM chips due to cosmic rays and concludes that the soft error rate correlates with the flux of 10-170 MeV neutrons. Also see Ziegler et al, The Effect of Sea Level Cosmic Rays on Electronic Devices, 52 J.Appl.Phys. 4305 (1981).
The infrequency of cosmic ray interactions together with the difficulty of creating high energy neutron beams makes testing for such effects a problem. Consequently, simulations have appeared; for example, Shrinivasan et al, Parameter-Free, Predictive Modeling of Single Event Upsets due to Protons, Neutrons, and Pions in Terrestrial Cosmic Rays, 41 IEEE Tr.Nuc.Sci. 2063 (1994) describes a design tool for assessment of cosmic ray soft errors in a chip design.
The present invention provides a method of testing integrated circuits for cosmic ray induced soft error sensitivity by use of a heavy ion beam impacting the integrated circuit to emulate recoil nuclei that would be created by cosmic rays interacting with silicon nuclei in the integrated circuit. Thus a large number of events can be easily generated and provide fine detail analysis. Further, the heavy ion beam can be focussed at particular spots on the integrated circuit to differentiate effects of various design choices. Also, the ion beam can be blanked so single ion events can be analyzed.
This testing method has the advantage of good emulation of neutron-silicon recoil interactions with a simple testing setup.